The POWER and PowerPC General Discussion / News Thread

I laugh when people think theres only intel and amd.

Listed in my sales thread.

Not sure if this is the right place to share, I found this on voidlinuxā€™ reddit, I really wanted to show this off to others:

Just found out that the owner of those rigs, @q66 is a member of Level1Forums too (hi, I really like your contributions, you are awesome). You should read his OP and the full thread on reddit if you want to learn more (I see there are some related posts in this topic too). His rigs are:

  • Raptor Blackbird - IBM POWER9 8-core, 32G RAM, Radeon RX 5700 XT - void ppc64le - main desktop
  • Raptor Talos 2 - IBM POWER9 18-core, 128G RAM, headless - void ppc64le + void ppc64 KVM - tower server under the desk
  • Power Mac G5 2005 - PowerPC G5 (970MP) 2x2.3 GHz, 16G RAM, Radeon R5 235 - void ppc64 - 64-bit big endian testing + experiments
  • Power Mac G4 MDD - PowerPC G4 (7455) 1.25 GHz, 2G RAM, Radeon 9600 XT - void ppc - 32-bit big endian testing + experiments
  • Mac Mini G4 - PowerPC G4 (7447A) 1.42GHz, 1G RAM, Radeon 9200 - void ppc-musl - testing
  • PowerBook G4 2005 - PwerPC G4 1.5GHz, 1G RAM, Mobility Radeon 9700 - void ppc - testing on the go
  • Pinebook Pro - Rockchip RK3399 (2x Cortex-A72, 4x Cortex-A53) - void aarch64 - travel laptop
  • SolidRun HoneyComb LX2K - NXP LX2160A (16x Cortex-A72 2GHz), 32G RAM, Radeon RX 570 - void aarch64 - ARM build box + experiments
  • Thinkpad X230 - i5-4420M, 16GB RAM - void x86_64-musl - former travel laptop, x86_64 test machine
  • Pentium 4 Prescott, 3.06 GHz, 2GB RAM, Radeon 9200 SE - void i686 (and win2k) - bare metal DOS, old games, i686 tests

This made me think twice about getting a Ryzen in the future and now Iā€™m thinking to either go with a Honeycomb LX2K or an OpenPower platform. I may change my mind until I finally purchase a new PC (I prefer low-power, efficient PCs, like the Honeycomb), but I donā€™t mind using either of those architectures, as everything I actually need is open source (and I can always just use QEMU to emulate x86, or make a cheapo x86 pc in case I want). Iā€™m thinking of going small, with ARM at first (I do have a Pi 2 running Void in which Iā€™m trying self-hosting stuff, like a Matrix Synapse server and soon a mail server).

Hope this is not spam or off-topic (if it is, sorry).

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No, this is the spot.

Tbh, depending on your workload, arm isnā€™t quite there. But that may change in 3 months. Its getting really close.

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My workload, except for the future PeerTube instance I want to host, will likely be many low-cpu intensive tasks, like a mail server, a DNS, a basic html website (maybe with some php pages), a chat server (most likely Matrix), an OpenVPN server (or WireGuard if it is really just as good as the hype around it shows), maybe a Searx instance (though Iā€™m ok with using ddg) and other similar self-hosted stuff.

Iā€™m not going to buy anything at the moment, probably for the next 6 months or so, but I want to plan in advance and see what the market has to offer. I managed to keep myself tamed and not spend money on a Ryzen (which would have been a good investment, donā€™t get me wrong, but itā€™s not something I need urgently, but something that I want). I want to host lots of stuff that Iā€™m going to use and learn from - and maybe help others out with tutorials or similar stuff (I want to contribute knowledge to the world, but as I am right now, I will probably do more harm then good, so Iā€™m just learning stuff as I go).

Iā€™m using wireguard as ingress to my pi 4 k3s cluster. Itā€™s fucking lit.

Youā€™re good with ARM then, itā€™s pretty much 100% working now, for those sort of workloads.

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I expected better from you? /s

@ThatGuyB PPC will see a resurgence soon as it morphs from being a platform that only performs best at full tilt to a platform that performs well as a workstation and for power users. SMT is really where PPC shines, and DB workloads.

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Iā€™ve started seeing a resurgence as well in the past year or 2. And with OpenPower and maybe even making the Power ISA free, thereā€™s a big potential for PPC to rise. I wonder what the future of ARM will be with a completely free Power ISA and with RISC-V out in the wild (especially now that ARM raised their license prices by as much as 4x for some clients, after Apple made the ARM Macs announcement).

Choice is great.

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PPC will never replace mobile. It is too power hungry to enter that market without Architecture fragmentation. RiscV will more than likely unseat ARM before PPC gets there.

On the other hand, AMD had given the PPC architecture a run for itā€™s money in the enterprise world. PPc only holds a small, but well deserved, niche in the enterprise environment. POWER is working on that now and Power9 was the first major step in that direction.

Where OpenPOWER can clean house right now is to convert the aging MIPS market since MIPS is pretty much dead at this point. And have Oracle license POWER to replace SPARC since Toshiba is never going to release the new SPARC processors it has been working on for the last 7 years or so.

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Welp.

I guess you missed discussion in the lounge about my college days xD

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Mips mean nothing today

Processor throughput means something

Yeah. As a RISC fan in general, MIPS always fit the bill when power usage was the limiting factor. Then ARM ate most of that market except for the few niche cases. Then PPC cores on smaller dies ate most of the other MIPS market (routers and logic systems) and most embedded use cases.

MIPS could win some of that back if actually release 64bit MIPS but between all of the passing around that has happen to the MIPS company, it is basically vapor ware at this point.

Also I donā€™t mean Millions of Instructions Per Second, I mean Micro Processor without Interlocking Pipeline Stages. The RISC architecture that eventually influenced the ALPHA architecture.

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https://www.anandtech.com/show/15967/nuvia-phoenix-targets-50-st-performance-over-zen-2-for-only-33-power

Now Nuvia wants to enter the ARM Server market.

Within the Enterprise RISC world, do you think ARM Serverā€™s will eat Open POWERā€™s cake or can they co-exist?

https://www.anandtech.com/show/15621/marvell-announces-thunderx3-96-cores-384-thread-3rd-gen-arm-server-processor

Marvell has the ThunderX3 with 96C/384T on TSMC 7nm.

Thatā€™s worth keeping an eye on.

https://www.anandtech.com/show/15575/amperes-altra-80-core-n1-soc-for-hyperscalers-against-rome-and-xeon

Ampere Altra has 80C but Single Threaded for security.

How is POWER10 looking?

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POWER10 is on the schedule for Hot Chips 32 day 1 of talks (2020-08-17), so in a week we will have more information. Anandtech has an article about the schedule.

Officially

Besides that, the most recent article specifically about POWER10 is probably,

Though there is ongoing work to add support to the linux kernel, phoronix usually mentions this:
https://www.phoronix.com/scan.php?page=search&q=POWER10
most recent article at time of posting is about changes in Linux 5.9:
https://www.phoronix.com/scan.php?page=news_item&px=Linux-5.9-More-POWER

Unofficially Confirmed via Twitter

in the comments for a recent Talospace post, Raptor said:

There will probably be some exciting announcements for POWER hardware late this year / early next. Not POWER10 yet (IBM made some very poor choices regarding POWER10 that currently block our products and that we continue to work to resolve) but POWER overall is looking quite healthy for the future. For now, POWER9 is definitely the best way to go to get an open, owner-controlled, powerful system with long term support and tons of distro choices!

Not yet. Weā€™re keeping it a bit under wraps at the moment while negotiations etc. are carried out, but suffice it to say any POWER10 systems from competitors in the interim will not meet the normal Raptor standards due to the causative IBM decisions.

Edit:

Other assorted news

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Hot Chips 32 POWER10 Info

Courtesy of Ian Cutress (Anandtech):
Hot Chips 2020 Live Blog: IBMā€™s POWER10 Processor on Samsung 7nm (10:00am PT)

  • 602 mmĀ² on Samsung 7nm node
  • die is physically 16 SMT8 or 64 SMT4 cores, though one core (or core pair for SMT4) is disabled for yield reasons - in practice this is what happened with POWER9 anyway, most cores per
  • on-track to deliver systems in 12 months
  • 3Ɨ efficiency relative to POWER9
  • 10-20Ɨ matrix-math performance per socket relative to POWER9
  • 2Ɨ ā€œgeneralā€ SIMD and 4Ɨ matrix SIMD per core relative to POWER9
  • chip connected to the outside world via PCIe 5, OMI, and PowerAXON (OpenCAPI, NVLink, processor interconnect, etc.)
    • OMI (Open Memory Interface) takes the place of a direct DDR4 or DDR5 connection
  • will be available as either:
    • SCM (Single Chip Module) - up to 16 sockets
      • up to 15 SMT8 (30 SMT4) cores
      • 4+ GHz
      • 32 lanes of PCIe 5
    • DCM (Dual Chip Module) - up to 4 sockets
      • up to 30 SMT8 (60 SMT4) cores
      • 3.5+ GHz
      • 64 lanes of PCIe 5
  • PowerAXON and OMI support 1TB/sec each
  • Memory Inception appears to be a feature to allow multiple machines to share RAM over a local network with minimal overhead

I think the benefit of the OMI interface replacing direct attached memory (DDR_) is that while it is said to add < 10 ns of latency, it greatly increases the possible memory bandwidth. It will also allow the same CPU to upgrade from DDR4 to DDR5 memory; however, this requires special DIMMs with an OMI controller. It may be possible to have an OMI controller on the mainboard, and use standard memory (Raptor was planning to do this for Talos I, as POWER8 used the predecessor Centaur memory interface) but then the board could only be compatible with either DDR4 or DDR5.

See also

Patrick Kennedy (ServeTheHome)


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Iā€™m guessing this is for blade servers or something similar. But still, wew.

surprised pikachu face
Wouldnā€™t this mean POWER10 would basically beat AMD in performance / watt? Things are getting exciting. Gotta read the articleā€¦

Probably not, IBM has been doing this for a while, each set of four sockets is rack mounted separately in (I think) 4U. Then there is also a 1U controller unit. If you are curious look up E_80 (E980 for POWER9, E880 for POWER8).

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^This.

I do wonder about power efficiency since that has never been an attraction factor for Power/PPC. But if they are able to at least get down to EPYC levels of power efficiency, we may just have a real architecture war in the enterprise world with x86_64, Aarch64, and Power.

Toshiba, when are we ever going to see the new SPARC?

All the benchmarks that Iā€™ve seen for SMT8ā€™s performance boost over SMT4 is relatively minimal.

Would a nice compromise be SMT6 theoretically?

And man, this years reveals has some ridiculous Cache architectures and CPU architectures.

Thunder X2 has 32 MB L3
Thunder X3 has 90 MB L3

Thunder X3 also has 64 KB L1 I$, 32 KB L1 D$ which is kind of odd to be that mismatched.

512 KB L2 $


The ThunderX3ā€™s architecture is ā€œUniqueā€ to say the least.

POWER 10:
120 MB L3 <- EPYC size L3 cache going on!
2 MB L2 per core <- Thatā€™s 4x the size of Zen 2ā€™s L2
48 KB L1 I$, 32 KB L1D$ <- Interesting choice compared to itā€™s RISC ARM based cousin

The Architecture looks intriguing

OMIā€™s flexibility sounds AWESOME, I wish consumer platforms could get access to it.

The Memory Inception looks AWESOME in terms of functionality.

The IBM z15 also looks neat as that other CISC based cousin.
z15:
960 MB L4 cache <- @@ OMG, OverKill, I love it!!!
128 KB L1 I$, 128 KB L1D$ <- Thatā€™s HUGE
L2 I/D$ (4MB) Private <- Interesting choice to divide it to I/D sets
256 MB L3 <-@
@
5.2 GHz Frequency!!

:frowning:
Screenshot_2020-08-18 Raptor Computing Sys ( RaptorCompSys) Twitter

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Oooof.