DDR5 4 dimms on am5 -- what's working, what's not?

Not usually achievable. You could try a coordinate descent search on the terminations and such and see if it goes anywhere. But FWIW my experience is it’s rare to find an improvement, much less one making the transition from unstable to stable, and most steps make things worse. Spending hours periodically bricking your board and flashing back is pretty normal.

Optimal terminations depend on package, socket, mobo, and DIMM PCB impedances as well as socket type and DRAM. So they’re more variable than timings and what works well is less likely to transfer between builds. That said, I’d probably start by seeing if lowering the processor drive impedances helps any.

Hard to tell with VDD and VDDQ both being reported as 0 V.

The people at AMD who actually know don’t seem to be saying, Doesn’t stop people who don’t know from posting claims that LLMs pick up and repeat. ¯\_(ツ)_/¯