Z370 PCH Bandwidth

Hello everyone, I got a question. The Z370 PCH has a DMI link of X4 between the CPU, but how are motherboards getting away with 2 M.2 PCIE x4 connections and IO ports like USB on the PCH? Isn’t that a huge bottleneck or is it doing something like fast switching that you see on PLX chips.

I’m asking because I’m looking at an Asrock Z370 Extreme4 where I want to do an M.2 SSD slot and a 10Gbit NIC off the PCIE X4 slot going to PCH. I can’t seem to find the Block Diagram for this motherboard but I will ask about that in another thread.

Thanks in advance!

As far as I know and I could be very wrong, most of them are just plain pass through, no fancy PLX switching.

With a few, even 2, fast NVMe drives yes you would saturate and thus bottleneck the DMI connection. But I guess they are banking on all the things being slower like sata speed and also not in constant use so that it can juggle them a bit and still come off near full speed on pretty much all of them.

Hopefully the wrong answer will lead to the right one as is the way of the internet.

Yes.

This is a bit why Intel’s PCIE lane claims are a bit disingenuous. Especially on X299.

16 lanes come from the CPU the rest come from the chipset and yes all of those remaining lanes need to go through one X4 interface.

So under certain conditions you will see a bottleneck if using a lot of IO at the same time. How much of an issue is that? Prob not a huge one as it is unlikely you will ever be hitting everything at full load at the same time but it is possible and certainly worse than all the PCIE lanes going directly to the CPU.

To add to it, it is very basic but here is some form of a simple block diagram for some slide they put out.