What is IIO non posted prefetch?

Can’t find anything on this aside from the stupid hp forums, where it will not allow me to read any answers. Anyone know what this does?

Board is supermicro x10srm-f. It’s in chipset > north bridge > iio configuration > IIO1 configuration

Not finding much either, though opting out of completion TLPs seems preferred as a performance tuning since roughly Broadwell. Lenovo mentions ES-2600 v3 and v4 Xeons so you could also try documentation for Haswell and Grantley. I suspect the most effective place to look might be behind PCI-SIG’s paywall, though digging through discussions of the PCIe transaction layer would probably eventually turn up something on Intel optimizations.

Weird how difficult it is to find information on this bios option. Might have to message em. Thank you for looking.

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