Roadmap to POWER10
I keep seeing similar looking roadmap charts with minor changes between them, so I thought I would make a post here with what I find as most recent info:
POWER9 SO | POWER9 SU | POWER9’ | POWER10 | |
---|---|---|---|---|
General Availability | 2017 | 2018 | 2019 | 2021+ |
Cores | 12/24 | 12/24 | 12/24 | TBA |
Lithography | Globalfoundries 14nm | Globalfoundries 14nm | Globalfoundries 14nm | Samsung 7nm |
Marketing | New Micro-Architecture Direct Attach Memory New Process Technology |
Enhanced Micro-Architecture Buffered Memory |
Enhanced Micro-Architecture New Memory Subsystem |
New Micro-Architecture New Technology |
Sustained memory bandwidth | 150 GB/s | 210 GB/s | 400 GB/s | 435+ GB/s |
Standard I/O Interconnect | PCIe Gen4 x48 | PCIe Gen4 x48 | PCIe Gen4 x48 | PCIe Gen5 |
Advanced I/O Signaling | 25 GT/s 300 GB/s |
25 GT/s 300 GB/s |
25 GT/s 300 GB/s |
32 & 50 GT/s |
Advanced I/O Architecture | CAPI 2.0, OpenCAPI 3.0, NVLink 2.0 |
CAPI 2.0, OpenCAPI 3.0, NVLink 2.0 |
CAPI 2.0, OpenCAPI 4.0, NVLink 3.0 |
TBA |
I’m mainly using the 2018 October EU OpenPOWER Summit OpenCAPI presentation as a reference, but also adding info from a Jeff Stuechelli video saying 400 GB/s per socket, and POWER10 as “some time after 2020”.
IBM terminology
The suffixes used for revisions of POWER chips have specific meanings:
Plus sign +
a “plus” chip in the IBM lingo means something very precise, and that is usually a process shrink coupled with some slight microarchitecture changes
from NextPlatform article on new roadmap (April 2016)
Prime symbol ’
it designates a change in the I/O and possibly memory subsystems in a Power processor; it is distinct from a plus sign, which means a change in process or architecture or both in a Power chip, but well short of a major version which has big changes
from Nextplatform article on Samsung as POWER10 fab (December 2018)
Sources and past roadmaps
- 2016 April OpenPOWER Summit roadmap - NextPlatform article and IT Jungle article have same author
- 2018 Roadmap at Hot Chips - Anandtech article, HPCWire article (better image)
- 2018 October EU OpenPOWER Summit - from slide 12 of OpenCAPI and its Roadmap presentation
- 2018 December NextPlatform article on Samsung being the POWER10 fab contains two roadmaps, one from a 2018 OpenPOWER Summit (not sure which one though)
Because the OpenPOWER machines only use SMT4 chips, some roadmap charts intended for OpenPOWER audiences may say “24 cores” rather than “12/24 cores”.
However, it is entirely possible for OpenPOWER vendors to use the SMT8 chips, though they choose not to: