There should be a new batch out until April 11th...It is said that manufacturers are increasing production cause they underestimated the launch...
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Now the "wait until ryzen release" turned into "wait until your god damn order arrives... for freaking christmas SON!"
Do you remember any hardware launch that does not start like this...At least it is not the Switch....
This is the first launch where I had enough money to buy within 3 weeks of launch.
It still sucks.
You should never buy the 1st batch of boards anyway...Let others do the beta testing...
In the local stores the boards just pop in and out of existence.
One day you have board "A", next day you don't... 3 days later - it's back again, until 2 days later it's sold out...
Especially the cheaper B350 and X370 boards... The crazy expensive Gigabyte Aorus Gaming 5 is still in Stock everywhere. And many places still have the first board to hit the market here - Asus Hero...
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That batch should be sold by now anyway. Estimated delivery is 31st for me.
Places like microcenter that have a thing where you can only buy one per household is still in stock. But microcenter is based in the US.
Here is some benchmarking. Based on 6 core 12 thread and 4 core 8 thread.
I am still waiting on seeing better single core performance in the future from Ryzen at an affordable price. About affordable price .... LOL at that happening in Canada with our dollar and with NCIX really having no competition when it comes to computer hardware pricing.
https://community.amd.com/thread/211126
I'm curious about this new fabric thing... I've read pages and pages how cores, modules, and cash work on RyZen... And heard all the talk about Win scheduler, which turned out to be nothing but the hot air.
However, I haven't seen yet in-depth analysis of the new thing here, which is the infinity fabric. How does it work? What about it's design? Is it just a bus, or a more sophisticated matrix? How does it behave on different voltages, frequencies, or temperatures? How could it possibly bottleneck the CPU, cause problems with memory controller, or limit overclocking range for the CPU?
RyZen is interesting, because it is essentially a SoC, and it's also interesting if and how meddling with one thing can get you in a trouble with another... There's also this SenseMI thing, which seems cool, does it's thing, but is also yet another link in the chain. Lots of suspects here.
But before loosing the scope, I believe that this infinity fabric thing should be studied more thoroughly, in order to fundamentally understand what's happening inside RyZen, and how it could be improved, before analyzing controllers and cores. It keeps it all together, it it really does matter. Like really, really. Perhaps a possible topic for a future L1T video? :-)
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I'm sorry but WCCFtech is not a valid source. So please find a different one.
But, the infinity fabric is interesting. IT means that memory speeds really do matter again, lol.
Yes, and yes. It's PCIe connections between the CCX modules.
Doesn't bottleneck the CPU, it can bottle neck super high end GPUs at 1080P but who goes and buys a 1080Ti for 1080P lol.
It won't have anything to do with either of those. In fact faster memory helps the Infinity fabric. And overclocking on Ryzen is "poor" (not really but kinda) because it's a first gen uArch so.
Fancy word for a super accurate monitoring tool. So the CPU knows what temp its at, etc, at all times, down to the ms, and can make changes in the ms range to boost frequency and such.
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Windows scheduler is working properly, but that doesn't mean it has the proper scheduler. I read somewhere maybe here that a NUMA based scheduler would increase performance. This is meant for dual socketed systems, which Ryzen technically is dual cpu with a bridge between the two on one silicon chip. Hence the reason AMD performs better with faster ram than intel does.
The scheduler has nothing to do with it.
... Not in the way everyone thought, but it isn't entirely irresponsible either. It is possible that jumping between CCXs is impacting performance. The problem is that NUMA wouldn't fix it. PCPer did a video about it.
Core to core communications are excellent, but CCX to CCX communications aren't. It's entirely possible that programs are jumping CCXs which would add excessive amounts of latency.
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But CCX to CCX latency has more to due with memory, than anything.
Just look at the performance scaling with memory going from 2133mhz to 3600mhz, is like 10-30% depends on application.
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What PCPER said was that their would have to be testing to see if it would improve performance with a NUMA scheduler. That is where I heard about it. I could be wrong. But if it is essentially a dual socketed chip it would benefit from dual socketed optimizations no?
Very, very true. Sort of. The interconnect between them runs off of the RAM frequency...
The issue with NUMA (as I understand it) is that it would have to be accounted for by each individual program, which would mean that some companies will do it, while others won't because it would cost money.
Numa really wont matter much. I mean benches in linux vs benches in windows (assumming same compiler, and so forth) have maybe 1-10% difference at most. And Linux has the right compilers if its updated for ryzen afaik.
I have overloaded on Ryzen. It is cheap" ie good " make sure if you buying to get a good MB and memory pair that will clock as high as possible.
The first ITX board is here...
Let the flood gates open.
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