i will try this with GTA V, World of Tanks, etc on a variety of things.
also @wendell this OCAT thing may be a good way to analyze frame times, possibly better than FRAPS
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PCper did some testing last year comparing FRAPS and PresentMon. The latter had more consistent result closer to the FCAT data IIRC. I'll dig up the link to the article... there:
https://www.pcper.com/reviews/Graphics-Cards/PresentMon-Frame-Time-Performance-Data-DX12-UWP-Games
Relevant graph:
This was done more than a year ago though, PresentMon released their 1.0 version just a week ago or so.
Anandtech talks about the difference between SMT on and SMT off being due to differences in "Static and competitive partitioning". This has to do with what resources in the core are shared with SMT threads and what is not. Found the relevant slide (at Sweclockers of all places):
There probably is some compromise to get that wonderful SMT perf in Cinebench et al.
Static partitioning methods being used shows performance gains when SMT is disabled
The issue of single-thread performance increasing when SMT is disabled (we’ve done some pre-testing, up to 6% in ST) is clearly related to the design of the core, with static partitioning vs competitive partitioning of certain parts of the design.
Edit: Wikichip has a good bit on this here:
https://en.wikichip.org/wiki/amd/microarchitectures/zen#Simultaneous_MultiThreading_.28SMT.29
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Oooh
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And Ian Cutress has confirmation on the CCX configs:
We have confirmation from AMD that there are no silly games going to be played with Ryzen 5. The six-core parts will be a strict 3+3 combination, while the four-core parts will use 2+2. This will be true across all CPUs, ensuring a consistent performance throughout.
So there's that, 3+3 and 2+2 it is.
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That's odd, so how much cache will the R5 1400 have, What I found so far states 8Mb. Which leads to believe that there is either a 4+0 version or the 2x8 Mb cache has been split too into 2X(1/2)8
8MB as in 4 per CCX I assume. The L3 is accessible by all cores on the CCX by a crossbar. Half of it disabled per CCX then, there ought to be dies with imperfections in the L3. They get to be the four-core parts.
That would suck, if true.
No...
4+0 would kill the performance.
2+2 even with half the cache is a lot better.
I will wait for reviews, before I take that as fact.
I have tested each and every core config on my 1800x and any that have __+0 get rekt compared to the same amount of cores when evenly distributed
I.e. 2+0 is much worse in perf and speed vs 1+1
Or 4+0 is way worse than 2+2.
I can pull up results when I'm home again.
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There is no "if". It is official information from AMD.
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If you look at AnandTech, you have the 1500X and the 1400. The 1500X does have 16MB.
So that would not suck.
I would love to see those numbers
i think @Fouquin did some testing
but may or may not still have them on hand lol
i will run stuff like CB on all the different core configs, perhaps also the CPUz bench... maybe gaming with GTA V or something? will see.
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relevant
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Interesting Pricing
Except there are 0 mainboards available.