ECC Memory is supposed to be supported (depending on the platform/motherboard) - is this actually true? Previously AMD explicitly disabled ECC memory support on any Ryzen APU (AM4) that wasn’t a “PRO” variant.
PCIe Lane Count: AMD lists 20/16 as Total/Usable - that amount seems strange to me: AM5 CPUs have 28 in total (16 (“GPU”) + 4 (NVMe) + 4 (NVMe 2 or extra gimmicks like a Thunderbolt controller) + 4 (Chipset interface uplink).
Is there a regression in the amount of PCIe lanes with Phoenix APUs? Only the support for only up to PCIe Gen4 instead of Gen5 was to be expected due to the constrained power budget.
According to Techpowerup the Radeon 780m only uses 8 pci lanes.
Integrated Graphics
Release Date: Jan 4th, 2023
Generation: Navi III IGP (Phoenix Mobile)
Predecessor: Navi II IGP
Production: Active
Bus Interface: PCIe 4.0 x8
Beginning with the 4000G APUs the APUs got the same amount of PCIe lanes as the AM4 CPUs (16 + 4 + 4), only just Gen3 instead of Gen4. The Vega iGPU was connected internally via an Infinity Fabric variant, not taking away any of the externally available PCIe lanes.
Was hoping that the new Phoenix AM5 APUs would do this in a similar way.
cuz i wanted to build an AM5 NVMe Server/NAS storage with a GB B650I Aorus Ultra ITX board with the ASUS GEN4 Hyper x4 m.2 quad nvme card bifurcated x16 slot to x4x4x4x4 and use the iGPU 12CUs for Display// if i CANT EVEN DO THIS! THEN IM NOT BUYINGONE THEN… NED OFFICAL SPECS of PCIe … mobile Z1e in ROG ally in gpu z says 780m gpu is on gen4 x16 bus?? is this not reported properly… i guess ill just sell the board since i cant use it for what i wanted it for… fuck amd . im getting very pissed at AMD right now not making the AM4/am5 APU i want. I want more PCI e and or more iGPU CUs of like 20+ (strix halo 40CUs on AM5 ) but now i here strix halo is only a mobile apu not for am5 desktop. if this is the case then amd can fuck off then and i am done buying the garbage (GPUS especially) RDNA3/4 is all gonna be fu*cking over priced JUNK… 7600XT only 32CUs and 16GB GDDR6 and slightly faster clock for $330 bucks … NOTHANKS AMD UR DONE… I AM DONE/ @AMD go bankrupt you dumb mother FU**CKERS @AMD
iv had noting but issues on AM5… AM4 was way better. AMD need to stay on AM4 a bit longer AM5 is NOT FUCKING STABLE
just another paid beta tester i guess … fuck you AMD
The PCIe Lanes aren’t used for the iGPU, the lanes I’ve asked about in this thread are the ones you can use for your own devices in the motherboard of your choice. The iGPU is internally hooked up via Infinity Fabric.
AM4 4000G/5000G APUs have a total of 24 usable PCIe Lanes (including the ones for the chipset interface), AM5 CPUs have 28. If now AM5 APUs regress to only have 20 that would suck a bit.
Pure speculation, I don’t have hardware, if I did, I wouldn’t say anything until launch
But it might 8+4+4+4 (20)where the rest of the 7000 chips are 16+4+4+4 (28)
Or it just might be a typo or incorrect info
So all you can really do is wait for the official release. Not like you can buy it before reviews are out
Made this account just to ask a question after having read the spec sheet OP linked to. My understanding of PC hardware stuff is very pedestrian / through osmosis casually watching YT, so I wanted to get some clarification before making any purchasing decisions. Apologies in advance if I don’t explain my question well.
My assumptions (please correct where/if wrong);
Regardless of the PCI-E revision (be it 3.0, 4.0, 5.0), if I have a x16 PCI-E card, it needs to be in a x16 slot on the motherboard to have it run at its full speed.
As we move up the revisions (e.g. 3.0 → 4.0) the speeds are doubled.
PCI-E Gen 4 x8 being the same speed as PCI-E Gen 3 x16.
If I were to have some sort of adapter (I don’t know if that’s a thing) to allow me to plug in my physically and internally x16 card into an x8 slot, it would only be able to run at x8 speeds for the PCI-E generation of the card itself.
(e.g. A GTX 1080 in a Gen 4 or 5 slot would run at PCI-E Gen 3 x8. Not PCI-E Gen 3 x16 through a Gen 4 x8 slot)
In the reverse scenario, a higher generation card in a lower generation slot but with the same amount of lanes, the card runs at the lower gen’s speeds
(e.g. A 7900 XTX is Gen 4, but put into a Gen 3 slot will run at x16 Gen 3 speeds)
So now, the question.
The Ryzen 8700G on the specification sheet OP linked to says it has 20 lanes, of which 16 are usable. Does this mean that the only way you’d be able to get x16 lanes at PCI-E 4.0 speeds would be if absolutely NOTHING else in the system used any lanes? (e.g. no m.2 SSDs or Wifi)
As in, will all systems using a 8700G be unable to run a dedicated graphics card at x16 speeds? That sounds like it would put quite a damper on the upgrade path once the 780M isn’t satisfactory performance wise anymore, limiting the theoretical performance of a dGPU to half. As well as either needing a way to connect the x16 card in the x8 slot, or needing a GPU that natively is x8 with an x8 slot.
Apologies again for how verbose this is, but I’m trying to get my facts straight and make my question clear.
Yes/depends. Define “full speed”. A physical x16 card with x8 electrical connection, like 4060 Ti, will work the same in x16 and x8 “open” slot, or via x8-to-x16 riser. A card which bandwidth is otherwise limited (e.g. by memory bus speed) might also have lower “full speed”.
In general, yes. At least for the last 3 generations (3->4->5) the speed doubled and encoding stayed the same. BTW, higher speed may also incur more transmission errors and require retransmission, but in ideal spec conditions that’s correct.
Most x8 and x4 slots are open-ended s.t. you can plug longer cards, also on most modern motherboards x4/x8 electrical slots use x16 physical with the end clip to secure cards, so you don’t even need an adapter in most cases.
And the final speed depends on the greatest common denominator of “slot support” (i.e. what CPU/chipset/switch/hba/etc supports), link and card. For instance a PCIe 3.0 card in 2.0 slot will run at 2.0 speeds (unless for some reasons 2.0 is not supported on the card). A 5.0 card in 4.0 slot using 3.0 riser cable will most likely only negotiate 3.0 speed (you may need to limit it in BIOS though because if it manages to negotiate 4.0 you may start getting transmission errors).
Not only that, you’d have to use a motherboard that would dedicate all those lanes to a single slot. While there usually is some switching available, the physical lanes are connected to physical ports on the CPU and for some reason I’m guessing the 8 lanes missing on the G variant are the other half that is typically routed to the first slot (*).
You won’t be able to fully utilize x16 speeds and you won’t be able to utilize Gen 5 AFAICT, so you’ll always be limited by 4.0 x8. The question is, is that even a limitation?
The PCIe speed hardly limits the speed of the GPU itself - it does influence the transfer speeds, e.g. texture loading times, and to some extent driver calls. This may or may not matter to you.
(*) TBH I don’t know if UEFI can technically remap those lanes in CPU, i.e. if that remapping can happen on-die. AFAIK the mapping of slot-lanes-to-CPU-pins-to-iodie is unchangeable.
Since I can’t imagine AMD killing all motherboards’ CPU PCIe NVMe slots (that would be hilarious!) this then means a confirmation for the 8 + 4 + 4 + 4 configuration.
I’ll just add that, according to the diagrams @Fouquin posted, the 16 CPU lanes should be dedicated to the GPU. But without motherboard layouts & assignment of non-G variant, I can’t confirm that’d be the case for all motherboards.
Nevertheless the diagrams show you which peripherals are routed through the chipset, those remain unaffected by your CPU choice (chipset always gets 4 lanes and switches them w/ all the other peripherals, just like an Ethernet switch).
Well shit, AMD has removed the ECC capability from the 8700G’s Spec page which is hinting at the same old, same old dick move of explicitly removing it from the non-PRO APUs. Any news about the 8750G or whatever it’s called?
Meanwhile the PCIe configuration of 8 + 4 + 4 + 4 has been confirmed in independent testing.