I am watching a Der8auer video on some laptops and he’s talking about the TDP of the chips.
I happen to know the fused value on my thinkpad X230T is 35, with a 45 watt boost that is unable to be changed because its the dual core not the quad. However I can add more power states, up to 3, to get better and better power out of the chip and better battery life out of my 63Wh battry that only charges to 19.2.
So he’s talking about the 25watt chip and here I am thinking, ok, so if my chip is 22nm at 35 watt standard, outputs only so much heat, and this is a… wait… No 28 watt 10nm 11 series chip, how is my laptop technically using more power? Is it rly just that the process is shrunk down and more shit is packed into the chip?
As well, how would I do the math to get better life out of my shitty battery? I would assume I could do some comparisons to modern hardware and get something out of it?
Or should I just go watch a few talks on TDP and figure out whatever autistic shit I am trying to figure out out separate from the forum?
I’m not really sure what you’re asking but I’ll try to answer what I think you’re asking anyway.
TDP is a very broad metric but most often it seems to mean the average total wattage being drawn by a chip at a sustained full load, sometimes it can go a bit above whatever the limit is set at (eg. 50W on a 45W rated part).
From what I’ve read wattage also doesn’t necessarily shrink 1:1 with a process node shrink as well btw (even for identical parts) let’s say a 90W part at 90nm gets shrunk to 45nm, it doesn’t necessarily mean it will suddenly draw 45W.
I’m really not sure to answer your battery question as I’m not sure what you mean.
TDP actually stands for maximum power draw. The problem is that when Intel calls a chip 125W TDP, they are referring specifically to the PL1 limits and completely ignoring PL2. Furthermore, this is more of a recommendation from Intel and the individual motherboard manufacturers can set either a higher or lower limit for both PL1 & PL2 (within the limits of the chip if a locked processor). They do this to get an advantage against other companies on comparison charts.
Smaller nodes generally require less power, but there isn’t really a hard rule or anything because there are too many variables involved. The only thing that can be said for certain, is that in the case of a refresh, going to a smaller node will almost always reduce power draw, but also decrease the overall thermal mass making the silicon more difficult to cool and sometimes run “hotter” with less power consumption.
That’s why I said it has a broad metric, because different companies seem to have different ways of defining “TDP”.
Maybe “peak” would have been a better word to use, although I did specify sustained full load.
I think that it is for this very reason that we shouldn’t use TDP as a hard metric to begin with. Same with measuring process nodes in nm, many generations ago that term stopped meaning anything measurably useful.
This is the reason why Intel suddenly went from 10nm superfin to Intel 7. They were always one step behind TSMC 7nm in transistor density and Intel’s 6nm is set to match TSMC’s density. It is even predicted that the Intel 5nm node is going to beat TSMC’s by a wide margin.
Much like with memory speeds starting to transition from MHz to M/Ts across the industry, we just need to stop using TDP and nm when we should be using PLs and transistor density instead. I also wasn’t trying to call out you personally, but more call out the use of TDP in general if you get what I mean.
That’s why I said it has a broad metric, because different companies seem to have different ways of defining “TDP”.