Is PCIe Bifurication limited to even # lanes only?

[Kamen_Rider_Blade]

When you BiFuricate a large lane, are you limited to even number splits and common lane #'s only?

Can you split the lane any arbitrary way?

e.g. 16x Lane -> 3x, 3x, 3x, 3x, 3x, 1x

Is there any technical reason why this kind of arbitrary user split can’t be done?

Why are all lane assignments 1x, 2x, 4x, 8x, 16x?
Why can’t we use lane allocations split in between those #'s?

[w.meri]

I’m not sure of the actual reason why they can’t be split willy nilly, but I do know that the PCIe standard only has x1, x2, x4, x8, x12, x16, and x32 spec’d out, so that may be at least part of the reason.

[mutation666]

Are lanes split to transmit and receive so always want even numbers ? (Guessing)

[Dynamic_Gravity]

The reason why you can’t arbitrarily split lanes like that is because there are only specific predefined modes to allocate resources to/from.

The controller is smart enough to know if you plug in a x16, a x8, or a x4, etc and has logic baked in to operate in different modes depending on what was detected.

These splits are always a base two number (because binary).

[Kamen_Rider_Blade]

So it’s a controller programming limitation.

[iopsaddict]

I’m hoping for a 2 x 8 if ASRock BIOS allows.

They could always beef up the ASPEED AT2500 with !12MB’s more of RAM.
I’d be happy.

[noenken]

@w.meri

x12,

Really? I didn’t know that one.

[w.meri]

It exists on paper, but I have never seen a device that runs it.

https://web.archive.org/web/20140715120034/http://www.pcisig.com/developers/main/training_materials/get_document?doc_id=4e00a39acaa5c5a8ee44ebb07baba982e5972c67

[Kamen_Rider_Blade]

https://www.anandtech.com/show/15821/microchips-new-pcie-40-pcie-switches-100-lanes-174-gbps

This company literally built the BiFurication Switch Chip that I wanted!!!

Edit:

Never mind, it’s very close, but not exactly what I wanted.

[Kamen_Rider_Blade]

If they followed PCIe spec properly, here’s what the Physical x## lanes would look like: