Fun Intel Anecdote, Qs, AMD ECC mobos?

Registered vs unbuffered and ECC vs non-ECC are orthogonal concepts. Unbuffered ECC DIMMs use “real” error correction.

From Wikipedia:

Registered, or buffered, memory is not the same as ECC; the technologies perform different functions. It is usual for memory used in servers to be both registered, to allow many memory modules to be used without electrical problems, and ECC, for data integrity. Memory used in desktop computers is usually neither, for economy. However, unbuffered (not-registered) ECC memory is available, and some non-server motherboards support ECC functionality of such modules when used with a CPU that supports ECC.

Now, DDR5 complicates things because even non-ECC DDR5 DIMMs use on-chip error correction (which is what you describe as “The stack of ram on the board does ecc on its own chips”), and DDR5 ECC UDIMMs apparently “only” support 72-bit wide ECC (EC4) (same as DDR4) while DDR5 RDIMMs can and often do support 80-bit wide ECC (EC8). Apparently, EC4 is enough to provide SECDED (as proven by DDR4 as well).

I’m not sure where this misconception that buffering implies ECC and vice versa comes from. Perhaps simply because server memory is mostly both, and desktop memory is mostly neither?

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