So this is a very technical question, I know about binning and how intel can limit things via microcode so my question is how do they differentiate a chip
Example I know that an i5 is an i7 with at least one defective L3 chunk, making intel disable 2mb of L3, but what about hyperthreading, is that disabled via hardware (is their something defective or is a component lasered off) or is it disabled via microcode (since my laptop has an i5 with hyper threading)
what about X99? I know the 5820k is a chip with only 6 working cores, but why does the 5930k have more PCI lanes while having the same amount of cores and cache, is this a hardware limitation (i.e something was fried and lasered off) or is this an intentional micro code limitation. what about the 5960X, is it a "full chip" or is it a 12(or 18)core Xeon that has 1/2 its cores dead?
Mobile chips, what sets apart a dual core i5 from an i3? they both have the same amount of cache, core and usually both have hyper threading? I know the i7 dual cores have 4mb of cache (more than i3s/15s)
anyone have insight into this?
it is probable that intel bins every cpu they make and has been doing so since the at least the Pentium 4 days. it is also probable that the micro code binning and laser cutting has been in use since the core 2 days. the use of different binning processes with current offering's is probably why we get k and non k SKU's and why we have a processor that has PCIE lane limitations ( probably could have all cores working but a defect in the PCIE controller limits the lanes usable so they laser cut cores and use microcode to limit bus.) but your guess is as good as mine.
the reason intel bins every cpu they make is so they dont have as many chips that they would have to toss otherwise. it is also possible that as they refine the process and have less defects on a whole that they make use of microcode and laser cutting to keep products lines different and to prevent someone from buying a low end chip but having a higher end chip for free. ala the old phenom II x3 unlocking to x4 and the x4's to x6 in the latter stages. all done in the bios, and i am pretty sure that intel does not want this happening with there products.
I do not have any specific answers to your questions however, you may find this interesting
AyyMD is doing the same thing as the i series.
The 4 core eight threads r5 are the 8 core 16 thread r7 cpus. But of course with cores turned off and such.
As said above companies do it to make money.
I have nothing to do tomorrow and will research this, so as to provide you an answer to your question on mobile cpus.
turning cores off is sometimes because of hardware defects.
I'm talking about stuff that is disabled artificially. like ECC
What I've heard/read is that Intel/AMD test every single chip that they produce, to see what that chip can do. Lowest Voltage, highest clock, # working cores, cache, everything. From there, they round the chip off to whatever it is closest to being (ex. Originally intended to produce a 6core-12 thread cpu, 1 core doesn't work, so they round it down to 4 core-8 thread).
It makes sense to me to aim to produce the best. If a chip cannot do the best, they round down to whatever it is physically closest to doing, to maximize the amount of good processors.
Of course, I have no proof for this, and I'd imagine it would be basically impossible to get actual proof from Intel/AMD/Nvidia/Snapdragon/everyone else. It's probably a well kept secret, so that us consumers would have a much less likelyhood of modding the CPU to get more performance, for a cheaper price.
Regarding HOW they do this (microcode or hardware), again, no idea, and doubtful that you would get an actual answer from an OEM.
well I understand the binning process. I.e only make quad core i7s, dead cache -> i5, deadcore -> i3.
but how they disable hyper threading, ecc, certain instructions is what I'm more curious about. Since we've had quadcore mobile i7s with 6mb of cache an hyper threading, which means its pretty much a desktop i5. Or Xeon E3s that are exactl same as i7s but with ECC support, and cut from the same silicon.
Doing some googling, I see you also posted this on reddit.
I am a stalker
But for real tho. I do believe that things get turned off via microcode. I have no proof for my claim tho.
Intel do have microcode release notes on their website. You could just google for that. And see if they ever added anything in. Then, that would kinda prove that things are turned off via microcode.
I found two already.
I already looked thru this one: https://downloadmirror.intel.com/25183/eng/ReleaseNotes_R0068.txt
Here is the other one: https://downloadmirror.intel.com/25288/eng/ReleaseNotes_BIOS53.txt
And while writing this I found another one: https://downloadmirror.intel.com/10347/eng/README.TXT
They are old tho....
yea I poste dthis ages ago.
It was more me thinking, what if we could load unsigned microcode, what could we accomplish? turn that i5 into an overclockable xeon etc.
If Intel does test every single chip and disable features according to defects, then even with successful microcode "unlocking", the features are still mostly broken.
As far as I know, the only reason the AMD X3 -> X4 conversion was possible was because AMD converted entire batches from a series (that were statistically under-performing I guess) instead of testing 100% of the chips individually. So you may OR may not get lucky with an X3. Lottery.
I don't know, I'm taking pot shots here.
the way that cpu binning and microcode works is the following. will be a little bit in layman terms.
Intel will make a cpu out of silicon by using lithography which means that they just use a light to shine through a template. The light reacts with a chemical on the silicon that forms stuff like traces and this is repeated several times to form layers that build up transistors and the like. This is not perfect method so instead of wasting money getting rid of good silicon, companies will just "bin" the cpus to the highest possible tier. Most of the time these connections are physically cut. This is why you cant turn your i3 into a 24 core xeon
The microcode is there to help fix anybugs that are in the silicon. So if skylake floating point numbers are always off by 0.01 then the microcode will just add 0.01 to the answer that the cpu generates. This is alao why microcode has to be signed because someone like the NSA could inject microcode the messes with the random number generator where it can produce a predicable number.
If you are lucky, or if you are a tech reviewer, you can get perfectly good chips that were downgraded just to fulfill inventories. This seems to be evident with Ryzen 1700s that all seem to be able to overclock to 3900- 4000Mhz just like the 1800X. I recall this happening often with FX8320s that OC'd so high on air cooling they had to be 8350s.
I'm going to be playing this silicon lottery very soon and am praying to get one of these Golden 1700s!