I’m thinking if running the IMC out of spec (as OP did) could cause something like this - signals desyncing or something.
Yeah, only just realised that @SoManyBanelings already mentioned how out-of-spec it was. The rated specs for 2 DIMMs per channel are really low for DDR5, I wonder if that’s some of the reason that EPYC Genoa went for 12 memory channels - so you can still have a good memory capacity with 1 DIMM per channel and not need 2 DPC.
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