Cpu settings for qemu - explanation needed

Hi,

I was using -cpu host -smp 12 but the result wasn’t pleasing.

For example Guild Wars 2 was complaining over a dual core,
and I got kicked due inactivity from Overwatch match making while I was loading the game.
Videos were laggy, hell hole system didn’t respond well.

qemu manpages says …

Simulate an SMP system with n CPUs. On the PC target, up to 255 CPUs are supported.

In my understanding the CPUs are still emulated and not directly attached. That’s why the VM didn’t respond well.

After some changes of my command, qemu still complained …
qemu-system-x86_64: warning: This family of AMD CPU doesn't support hyperthreading(2)
cause of this: -smp cores=6,threads=2,dies=1,sockets=1

To be honest, I dont know what die means and I thought my cpu uses eight cores with two threads (PU) each. And 6x2 cores cause I don’t wanted to attach all power to the client.

$ grep -m1 -A3 "vendor_id" /proc/cpuinfo
vendor_id	: AuthenticAMD
cpu family	: 23
model		: 8
model name	: AMD Ryzen 7 2700X Eight-Core Processor

I solved the problem by using -smp cores=12,threads=1,sockets=1 instead.

But still, I am confused by the manpages and QEMU settings.

qemu manpages …

For the PC target, the number of cores per die, the number of threads per cores, the number of dies per packages and the total number of sockets can be specified. Missing values will be computed.

hwloc manpages …

hwloc Objects
Objects in tuples can be any of the following strings (listed from “biggest” to “smallest”):

   machine   A set of processors and memory.

   numanode  A NUMA node; a set of processors around memory which the processors can directly access.  If hbm is used instead of numanode in  lo‐
             cations, command-line tools only consider high-bandwidth memory nodes such as Intel Xeon Phi MCDRAM.

   package   Typically a physical package or chip, that goes into a package, it is a grouping of one or more processors.

   l1cache ... l5cache
             A data (or unified) cache.

   l1icache ... l3icache
             An instruction cache.

   core      A single, physical processing unit which may still contain multiple logical processors, such as hardware threads.

   pu        Short  for  processor  unit  (not process!).  The smallest physical execution unit that hwloc recognizes.  For example, there may be
             multiple PUs on a core (e.g., hardware threads).

Her is a picture of my system topology …

I still think my cpu uses eight cores with two threads each.
Am I wrong ?

Can some1 explain to me what the difference between PU and hardware threads is, and what dies are ?
And why does qemu not recognize two threads for each core ?

PLS HALP \o/

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