Here is an interesting tech paper I found on DRAM refresh for any of you who are curious about the fine workings of RAM. This may help with getting stable RAM overclocks or stable stock RAM speeds if you have to input refresh timings manually.
http://users.ece.gatech.edu/~pnair6/hpca19/Refresh_Pausing.pdf
hmmm...so adding voltage only slows down the decay of information? Didn't read the whole thing, kinda skipped around.
Or is it to counteract drop in voltage?
Large part of DRAM refresh rates are based upon RAM Density and Temperature. Take for instance DDR3 4GB DIMMs. They will by default require a tRFC of 300ns and if they reach 85*C on chip temperature need to be refreshed every 3.9 microseconds instead of the standard 7.8 microseconds.
This is more of a study on the effects of data retension with RAM density and temperature. Of course, adding more voltage makes the RAM chips themselves hotter which is how they illustrate the necessity of 3.9 microsecond tREF above 85*C.
The paper also touches a little on the facts that we are going to have to have a redesign of DRAM Refresh when DDR4 is implemented.
I read through the refresh pause thingy which sounded cool, even if I don't understand how it is done. Either way I would probably like the ddr4 reduced latency. Wonder if that will effect overclocking? I will have to keep reading later, and pull out my dictionary lol.
I don't think we are going to see a huge, if any at all, reduction in latency with DDR4. I think the biggest implication with DDR4 is a massive reduction in DRAM Refresh timing to accomodate the 16GB-32GB consumer grade DIMMs we may encounter Rule of thumb is for every iteration of DDR we have implemented, DRAM Density capability has increased exponentially. With the advent of DDR in 2000-2003 we saw 1GB DIMM capacities By the end of DDR2 we were able to produce 4GB DDR2 DIMMs, this is a x4 increase in density over the last generation of DDR. Now with DDR3, we have capacities as high as 32GB DIMMs for server use, an exponential growth rate. Granted the highest speed DDR3 32GB DIMMs I've ever seen are 1333MHz ECC Kingston Server RAM, but it proves the point that with each iteration of DDR we see an exponential growth in maximum DIMM Density. I don't find it impossible that we may see 64GB-128GB Per DIMM density capacity with the advent of DDR4, especially if they are planning on redefining the way we implement DRAM Refresh.
Ah crap, now I am trying to figure out cpu cache as well. My brain is going to implode.