Strix Halo and I/O

So there are a lot of Strix Halo machines out there at this point and ROCm is starting to suck less than it used to, at least. Unfortunately for those of us who would like to cluster these machines for distributed inference work, there’s this problem:

It would be nice to be able to aggregate 8 of these very limited lanes into sufficient bandwidth to run a 100Gbps NIC. To my knowledge, there’s no way to do this and no one has constructed a STXH board with an alternate arrangement of lanes. Can anyone prove me wrong? (Please?)

I doubt it

I do have a build with an x16 electrical slot, but it’s x4 as you would expect

Could do 40Gbps NIC but, yeah, that’s not 100Gbps :disappointed:

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