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Ryzen 3000, GPU speculation



Just got to wait about a month and see I guess, 16 cores would be great. Hard to for me to really speculate on this since they got 2700X to 6GHz on LN2 on all 8 cores, and I would imagine dropping 1GHz would really drop the thermals…

If that record is real…


@Zibob @MazeFrame @thro
I think you missed the point; I’m making. I do agree with your statements. I’m simply disagreeing with what adored stated in his video .
(not to even mention he stated that each zen2 chiplet is 4 cores not 8.)

// do not comment on the screenshot of the dies functionality - i didn’t draw those those CCX or whatsoever on io… this on the picture i used to compare physical size on same scale.

I think @thro made first mistake not fully reading what i wrote in first post, about IO node and that it was a comment on Adored leaks and his statements.

Then on his response i shown how it would look like if it’s been done in a way adored specified.

again my response was to show why adored is wrong; while you guys been just pointing out same stuff I’ve written it would need to look like. Which makes no point…


When we all misunderstood you, I think it is safe to assume you did not explain your points good enough.


oh i did explain in my first post. ; as it was response on the adored video.


You’ve been about as clear as mud, so I’m not surprised there’s a misunderstanding here. I had to read your post about 5 times to get a semblance of the idea you’re trying to get across.

I think we all were under the same impression that you think there’s not enough room on die, or not a way to cut the IO die down for AM4.

A rule of discussions the internet: assume everybody else has no clue what you’re talking about

You responded to a 30 minute video. Adored made a ton of different points and leaked a lot of data here, you’re going to have to use a lot more detail.


TR4 will be 32 cores or 64 cores if they do a similar thing to Threadripper 2xxx series later.


Haven’t seen this particular video yet (busy, busy last few days - but i’ve watched every video he’s put out prior to this one in the past year), but if he said that i’m sure it was a mis-step and he said chiplet when he meant CCX. He’s been saying 8 core chiplets for months, it is clear from epyc publicity shots of 64 core packages that they are 8 cores, etc.

Unless he was talking 8 core ryzen 2, in which case yes, the chiplets will be 4 (working) cores each, with 4 disabled/broken cores in each chiplet.

Never say never. They’re on a cutting edge process and getting near on 99-100% efficiency (in terms of getting SOMETHING out of a die). This will make Ryzen 2 chiplets very cheap to produce overall.

Q: is this the only recent AdoredTV video you’ve seen on this, or have you been following? Because he detailed all this some months ago… and last month he mentioned 1/4s of an IO die. And the numbers for IO, memory channels, etc. work perfectly when it is cut into 4, for Ryzen 2.


Potentially. There’s also the whole Navi chiplet thing.


Yeah, i’d wager Navi + Ryzen is a Ryzen chiplet in various stages of broken-ness plus a NAVI chiplet where the other Ryzen chiplet would be on high end Ryzen. Both connected to the IO die.

They won’t have a different die that is say half Ryzen CCX plus Navi on same silicon.

Discrete Navi will be interesting; no doubt they will be doing similar things there with the modular design - possibly Navi can be cut up like the IO die, or (IMHO more likely) they use (or originally planned to use, but rumor has it navi won’t be modular) multiple Navi chiplets with an IO controller (possibly the same one) using GDDR or HBM memory channels on the IO controller instead of DDR4 on a NAVI dedicated GPU.

Guessing Navi chiplet will be maybe 16 CUs on a “full-fat” Navi die with lower tier Navi somewhat broken (some dead CUs). High end discrete Navi maybe 4 or more Navi dies connected up to a full Epyc style IO die using the GDDR or HBM and PCIe interface(s) as appropriate to communicate wth the memory on the rest of the card/package. Re-using the same IO die again. :slight_smile:

Could make for an interesting Epyc/Threadripper derivative if you were to have say 32 or 64 Navi CUs and 32 Ryzen cores (i.e., 4x Navi chiplets and 4x Ryzen chiplets) on the same package. But I’m not sure AMD would bother sticking Navi on a threadripper package to be honest, unless its going to be stuck in some enterprise compute scenario. Probably bandwidth constrained too.

Maybe a CPU/GPU compute hybrid EPYC chip instead?


IIRC a 24-core server APU was rumord in 2016.


A bit of cold water for this thread, I think it needs it.


Could be anything and nothing but…


Regular consumers won’t need 2x NVME drives.

They’ll get by with a single drive (like they always have done) with faster speeds via PCIe 4.0.

For regular consumers, the Navi onboard GPU will be plenty. Low end enthusiasts will be fine with 20 PCIe 4 lanes (i’m doing just fine with 20x PCIe 3 right now, just).

Anyone else will be pushed to threadripper, which is the enthusiast platform


Hardware unboxed (and PCper) were down on ryzen 1 before release too, and it turned out to be the hottest thing in 2017-2018, and currently out-selling intel 2:1 in germany where there’s a reseller who shares stats.

Just sayin’

I have a lot of respect for Steve’s benchmarking ability, but he (and his sidekick) are overly conservative and quite pro-intel by default IMHO.

I’m not saying they’re intel shills, just that they’re much more conservative and don’t like to speculate. That said, the video’s main beef is pricing - and that AMD simply wouldn’t price things that low if they were competitive.

Well, there is precedent. The 1700X / 1800X was HALF the cost of a 6900K (never mind the X99 platform additional costs) on release and competitive with it in benchmarks. The 2700X right now is extremely cost effective, especially when paired with a board.

And also due to their yields, at THOSE prices, amd can still make money whilst slaughtering intel in market share. Essentially, AMD are buying market share here. They need their name to be the default "go to’ for high performance and right now it isn’t. They need to get a customer base to establish a level of trust and doing that will require some pricing adjustment. But like i said, due to their multi chip strategy, they can afford this due to the die use efficiency they’re getting here.

I’d say the only thing really in doubt here at the moment is the clock speeds. The pricing i feel is ball-park, but i think the 5.0 or 5.1 ghz may be something like 4.7-4.8.

But it depends just how much better TSMC 7nm process is than GloFo 14nm. My suspicion has been for a while that GloFo 14nm is TRASH (compared to intel, samsung, tsmc), and that’s one reason why Polaris and Vega 10 clock so poorly. I’d suggest it is ALSO why Ryzen thus far has clocked so poorly.

I suspect TSMC 16nm would have been better (but AMD were bound to Global Foundries contractually), and their 7nm is going to be even better than that. 5-5.1 ghz? May just be right on the money IMHO. GloFO 14nm is nowhere near intel. TSMC 7nm? Way ahead…

I really feel in 2019-2020, you’re going to see AMD un-chained from the second-third rate 14nm global foundries manufacturing and performance is going to scale up quite a lot.


And we now know exactly why PcPer was so down on Ryzen.


Oh, I don’t think any of this out of the realm of possibility, just that it’s best to steel ourselves against and not let the hype get to us. Realistically whoever the leaker/source for Adored was, in their enthusiastic leak (assuming it’s not just a troll) probably didn’t consider that all of those sku’s are still just under consideration(in this HW Unboxed makes a very valid point).

I’m willing to believe that AMD might announce the 12 core part sooner rather than later to be either ahead or in time for intel’s rumored 10 core part, however the 16 core part, if it will be released in the 3x00 gen at all will likely stay in the pipe as a potential answer should intel manage to muster up some kind of a further surprise.


It’s not called the “Ryzen 3000, keep calm, we don’t know for sure” -thread. :wink:


Inb4 Ryzen totally not FX black edition.


What the hell does AMD have to gain from that? They need market share, especially at the high end… BADLY.

AMD need to kick intel while they’re down, and that means unloading everything they have RIGHT NOW. At the best pricing they can, whilst still making a healthy enough profit.

Right now intel simply can not compete. Sure they currently have their clock speed niche. Outside of that - screwed.

They’ve stagnated, were banking on process advantage as they always have, and they simply don’t have it. The mobile processor manufacturers have eaten the market and tech advantage out from under them. Samsung (in particular, likely TSMC also) has far bigger pockets than intel for this, and due to mobile being THE market to be in right now, a much larger reliable customer base.

THIS is the time for AMD to take market share, not fuck about and keep things up your sleeve to give intel a chance to remain competitive. This is the opportunity of a lifetime for AMD. Intel are having issues producing enough things on 14nm++++ never mind getting anything out better than that.

Sitting on tech they have simply because they want something up their sleeve at this moment would be total folly. Get the product out the door NOW. Get the market share, so that when intel come back (and they will), you’ve gained a comfortable and possibly loyal customer base.

Intel 10 core? LOL. At what cost? And in reality? Go try and buy an i9-9900k…



Had completely forgotten that there is that AyyMD Vega SoC clock there already, and search engines dont seem to understand that GPU SoC clock concept