Quartus II How To Split a Bus?

Dev Zone Code
1

Hi guys I am trying to make a register to a certain spec given to me. I need to be able to take a 4 bit input bus and I need to split it into four different 1 bit wires so I can send the wires to each of the flip flops. Do any of you know how to split a bus into 1 bit wires?

2

I want to do something like this in Verilog but it wont compile

module dem(a,b,c,d,in);
input [3:0]in
output a,b,c,d;
a=in[0];
b=in[1];
c=in[2];
d=in[3];
endmodule

3

for some reason this works?
module spliter(a,b,c,d,in);
input [3:0]in;
output reg a;
output reg b;
output reg c;
output reg d;
always
a=in[0];
always
b=in[1];
always
c=in[2];
always
d=in[3];
endmodule