Hey guys I am a computer science student and I am learning some stuff over computer architecture and I was wondering what this meant by doing two 16 bit operation as once? Is that like two assembly commands per one 32 word or is that like multi threading? Or is it BS?
essentially it lets the hardware complete twice the work in tasks which are 16-bit floats ONLY. What tasks they are depends on the game / application. But it’ll likely be useful in compute where less accuracy is required. A simple example would be compute in lighting, and a developer feels that 16-bit floats on a specific effect are ‘accurate enough’.
@wendell
I understand that using a 16 bit number would be like
LW $t0,0($s0)
ADDI $t1,$t0,5In MIPS assembly that is loading a 16 bit number from memmory and then adding it and 5 to register $t1. I was wondering if I could get an example in assembly of what is going on and how it processes two 16 bit numbers at a time. Would that be like a assembly instruction that directly fetches the memory in two different memmory locations and then stores it back into memory? I would imagine that to do that with 32 bit numbers would require more instructions leading to higher CPI and lower Amdhals score?
I am not sure on this architecture but have you looked at the instructions for vector operations? It may be like that but a vector of size two.
The load and etc happens in parallel on this though. Or half a clock if you want to think of it that way.
Looking at the vector architecture and its slowly absorbing have to learn MIPS as well for an exam. When you say vector size of two are you thinking there would be like 4 register files feeding into two VPU's?
Something like that maybe?
I could see the advantage for stuff that has to be O(n^2) or O(n). Do you know where they get these gigaflops from, is that just from amdahls law?