haha this story is more epic and completely insane than you know. Uber insane. I spent hours and hours and hours figuring this one out.
So the short answer is no, z87 has done away with ECC. It might post, but it won't use it. Note that i3s support ECC as well as Xeon -- i3 makes a perfectly competent 'small server' platform. I've been running a 20-odd extension i3 Asterisk voip system since gen3 i3 came out, ecc, the whole works. works great.
anyway, back to your question. So intel did this awesome thing. Z87 docs say ECC is supported. Boards support ECC ram. all of the "Intel Confidential" chipset/sampling supports ECC.
At the last minute, the retail batches of the chipset, they lasered it off apparently. They wanted an additional layer of segmentation between 1150 and 2011.
Here's a dirty secret though that'll get me flamed alive and came up during some of our earlier freenas videos because everyone was all firebreathing omg you must have ecc blah blah blah: memory densities now are such that on the silicon there is a limited ability to deal with errors even in non ecc modules. If you want the proof, see the jedec ddr4 spec where they're moving the crc to the bus. (this is detection, not correction, and the specific kind of error is primarily alpha decay). You can test this by, for example, running memtest 86 on a ddr3 machine for a few months and not experiencing any single bit error (the math, in terms of density, alpha decay, etc says there is like a 99.9999% chance you would have experienced at least a single bit failure in 3 months). Now ECC is awesome because it's end to end, bus wiring issues, etc. don't get me wrong -- errors can occur at many different levels of the system. What I'm talking about is literally inside the chip only, and not that great, but it was because ddr1/2 had a massive bit-flip rate from alpha decay, cosmic rays, or because manufacturers didn't know what they were doing)
But Intel is ditching it in z87 and I suspect the reason is segmentation but the reason it doesn't matter as much is because error handling stuff is being added to the jedec standard in ddr4 (they're explicit that this has nothing to do with ecc modules per se-- the ecc is another, more robust, thing).
So if you want ecc on socket 1150, you've got to get C226 chipset. Thanks Obama! I mean.. thanks intel! I still can't get over intel got rid of that in the final chipset release. What evil trolls.
Yeah.
p.s The atom is probably fine even for 5 systems. What sort of torture test can I do to test it for you? The other day I was re-copying my dvr'd set of star trek the next generation (its like... 200gb or some such) at wirespeed (100mbsec+) while streaming another show to my tablet (transcoding) and it was fine. I peeked at the cpu usage, on the 8 core, it was like 276% but everything still felt snappy. and smb was smb-ing like champ, which is a killer w/freenas. we've got a c226 asrock mobo video coming up. it's a very economical but more powerful alternative to the atom. you'd need to get a 1230+ to match/best the speed of the atom for a lot of things, though.