Clearly you now need to go and learn C! 
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hmmmm Or - play Factorio 
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the code is just an illutration, you can understand what’s going on without understanding code.
It’s a demonstration of that time that they added a backdoor to the login program. They supplied source code to the login program and upon recompile, the login program still had a backdoor. So the compiler was the thing inserting the backdoor.
With the source to the compiler you can recompile the compiler… then recompile the login program… only to find the login program still has the back door, Even though the back door is not in the source code.
How? The compiler knows when it is compiling both itself and the login program.
This paper, from 1984, in the context of elliptic curve crpto weaknesses, if you are at all interested in technology, should shake you to your very core?
Think about the implications.
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so i can build a server with this and make it impenetrable
I used to have a powermac g5 running honeypots and it was super funny watching the kiddies try to get x86 binaries to run
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LOL… x86 little endian on big endian PPC haha… Well alright good luck with that kids…
Hmm so I think debian and rhel current run on it correct? OpenSUSE?
The cost man… phew thats a hell of a pay in blackbird might be worth it though… SO when do we get to liquid cool it HAHA
The performance isn’t that good for something that expensive. The only benchmark it’s really good in is compression. I’m guessing it’s not doing so well in the encoding benchmarks because those libraries or the compiler isn’t much optimised for Power and VMX/VSX.
I’m also very curious of the emulated x86 performance. I wonder if I could expect something in the ballpark of a first gen Opteron as far as emulated single threaded performance.
Pretty sure its about software optimization… Id like it to be given a chance… having a good competitor to x86 would be great
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Someone on the Phoronix forums did say something about compiler optimization
Well like everything these things take engineering time especially around the BSP and also the assembler optimizations etc
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Simd is very weak on Power9 but it was almost working w/Nvidia Tesla. next power iteration will fix simd. I really wanna see avx512 on power lol
If you check our bench’s on fedora rawhide vs phoronix there are some notable uplift areas tho
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I would love to take the next iteration with its mobo… put it in a Core W200 from thermal take and have my gaming PC and Workstation sci comp PC all in one! Assuming it could be done PPC will have a tesla or Quadro (prolly quadro)… Gaming would have a Ryzen Pro if I can get my hands on one… and a RTX possibly unless AMD wows
and GCC has been optimized for a third of a century and AMD64 for about 15 years.
Maybe once this is in the hand of the library and compiler developers, we’ll see better performance in those benchmarks where it falls behind. Hey, maybe this won’t be an issue once Power 10 is out…
To the tenth power!
I’m sorry, I had to reference that episode. So many power puns to be made.
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Maybe we’ll see VSX-512 and IBM owing Redhat might turn it Yellow Dog Linux.
I’m all in on the vsx I wanna beat the other shit with a lead pipe till it contracts legionnaires
Liquid Cooling
I mean, IBM already has liquid-cooling blocks for the Monza module sockets on the AC922 systems; as far as I know those might well work on POWER9 Sforza as also.
I was comparing images of the sockets, and it looks like the mounting mechanism might be the same across all currently available POWER8 and POWER9 chips:
If you look at the start of that Twitter thread, @q66 was successfully using Raptor’s heatsink (intended for POWER9 Sforza) on a Tyan POWER8 board.
512-bit VSX
AFAIK:
- VSX, starting with POWER7, is 128-bit on 64 registers
- AVX2 is 256-bit on 16 registers
- AVX512 is 512-bit on 32 registers
IIRC, Zen’s AVX system was still internally 128-bit wide, but took 2x cycles on 256-bit operations. I think Zen2 is now 256-bit internally.
So, it sounds like VSX on POWER9 should be performing like AVX2 on Zen or Zen+, right? Just with way more registers to work with. Then Zen2 or any other native AVX2 processor will be faster, but have fewer registers.
So AVX-512 would be where POWER9 actually starts to be outmatched in both register capacity and execution speed, right? However, I’ve heard AVX-512 on Intel doesn’t actually run at full clockspeed (due to overheating?), so would a VSX expansion to 256-bit be close enough in performance?
If expanding VSX to 512-bit would require clocking down the whole core, I would guess that IBM wouldn’t even bother; especially with GPGPU, FPGAs, and other accelerators being brought closer to CPU through CAPI/OpenCAPI/NVLink.
This is pretty much the question I was asking in February:
Also, some good discussion in the FMA4 thread:
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I suppose something like that would be easier if IBM were to use Chiplets in Power10, they could bin everything for the enterprise and sell the cheap garbage stuff that they have to downclock to Raptor Computing for their lower end systems for developers or we could get a new PPC Amiga.
Why is that? Power9 hasn’t been exercised very much, so if its popularity isn’t rising very much, then perhaps it makes more sense to wait for RISC-V… And just live with the PSP/ME backdoors for now.
I’m not sure the connection @wendell was making between openpower & the above security paper - but I’m guessing it is just the fact that whatever can be hidden in the closed architectures of common CPUs. Which yes, I think that can be counted on - considering the funding these companies need and those who have the money to help (and their intentions).
Power10 seems pretty great with the memory encryption features that EPYC / Ryzen PRO has… And who knows how long it will actually take for RISC-V servers are available.