This does not work, unfortunately, or at least not with how CPUs are currently designed.
There are a couple of issues with this:
- Each CPU core (normally) has it’s own level 1 cache, which would take a lot more than one clock cycle to move to another core. So, yes it can move, and processes often do get moved, but more on human timescales rather than every clock.
- Modern CPUs use pipelines, so a single instruction is not actually completed in one clock cycle, but rather in several cycles. So it moves through each step in a cycle, so the throughput is good, but the latency for each instruction is more than a cycle. So it would be impossible to switch between multiple cores each cycle because nothing would get finished.
- Modern x86 CPUs use things called branch prediction and speculative execution to help mitigate the long pipeline latency, so switching cores would throw out all that work.
- For AMD chipsets, I think (but could be wrong) that there is multiple clock cycles of latency to communicate between chiplets.
It is a lovely idea in theory, and you are not the first to think of it, but it just doesn’t work like that in practice unfortunately.