AMD Epyc 7001 non-P models use 64 PCIe lanes from each processor for the communication between processors

Topic’s source: https://en.wikipedia.org/wiki/Epyc#First_generation_Epyc_(Naples)

If I undarstand this correctly, these 64 PCIe lanes from each processor are allocated/valid just in 2P systems? So if I’d install e.g. 7551 cpu in 1 socket mobo (e.g. Gigabyte MZ32-AR0) it’s possible to utilize almost all 128 PCIE lanes (with mobo constraints of course)?

Yes and no. EPYC does allocate 64 lanes for interconnectivity (Infinityfabric) between CPU’s, but dropping the same CPU in a single socket board does NOT free up those lanes. You need a P-model CPU (7551P) for a single socket machine.

I actually have 2x 7551P CPU’s, each in a Supermicro H11SSL-i system. (TBH, the 2nd system is still en route from China, but expected some time this week)

Thank you for quick response with the answer. :slight_smile: Although, I’ve found quite the opposite info at https://www.servethehome.com/single-socket-amd-epyc-7000-faq-answers-common-questions/

Q: If you put a dual socket capable AMD EPYC processor (e.g. an AMD EPYC 7601) in a single socket system, will I have access to only 64 PCIe 3.0 lanes?

A: You will have access to all 128 PCIe lanes. We tested the AMD EPYC 7401 in a single socket Tyan Transport SX B826T70AE24HR server and had access to all 24 of the NVMe devices we had installed, plus the NICs and boot M.2 devices. That means that the full 128 PCIe lanes were active, not just 64.

Anyway, the only way to be sure is to test it by yourself. :wink: I’m waiting for the mainboard and see.

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